ICASSP 2008 - 2008 IEEE International Conference on Acoustics, Speech, and Signal Processing - March 30 - April 4, 2008 - Las Vegas, Nevada, U.S.A.

T-12: Algorithms and Architectures for Next-Generation Optical Fiber Communications: A New Frontier for Signal Processing

Monday Afternoon, March 31
14:00 - 17:00

Presented by

Andrew Singer and Naresh Shanbhag, University of Illinois at Urbana-Champaign, USA and Finisar Corporation, USA

Abstract

The days when optical fiber was viewed as having unlimited capacity have come to an end, largely due to the steady growth in demand for bandwidth. Dispersion, noise and nonlinearities pose substantial channel impairments that need to be overcome. As a result, over the last decade, signal processing has emerged as a key technology to the advancement of low-cost, high data rate optical communication systems. The unrelenting progress of semiconductor technology exemplified by Moore’s Law provides an efficient platform for implementing signal processing techniques in the electrical domain, leading to what is now known as electronic dispersion compensation (EDC). In this tutorial, we provide an overview of some of the driving factors that limit the performance of optical links and highlight some of the potential opportunities for the signal processing community to make substantial contributions in this exciting, 100 billion dollar industry.

As data rates climb to 10 Gb/s and beyond, the performance of fiber optic links in long-haul, metro and enterprise networks is being limited by link dispersion and noise. Conventional optical dispersion compensation techniques have proved to be expensive and inadequate. As a result, the optical industry today views signal processing-based electronic techniques as MUST-HAVE technologies in terms of performance and cost. Electronic dispersion compensation has therefore emerged as a new application of signal processing techniques and their implementation using integrated circuits (ICs). The next several decades of optical communications will be dominated by the signal processing techniques that are used both for signal transmission as well as for equalization and decoding at the receiver. This change has only just started taking place, and this is an opportune time for the ICASSP community to learn about this rapidly growing and exciting area.

The intrinsic non-linearity of the optical channel combined with the high 10+ Gb/s rates present unique challenges, spanning algorithmic issues in transmitter and receiver design, mixed-signal analog front-end design, and high-speed/low complexity architectures for implementing the digital signal processing back-end. Though these are tethered applications, reducing power in these systems is also important, due to a stringent power budget imposed on the transponder in which such systems reside, in addition to the standard issues associated with packaging and cooling. A cost-effective solution, i.e., a solution that meets the system performance specifications with minimal power, requires signal procession algorithms that take into account not only the statistical impairments induced by the optical channel and all of the front-end physical layer receiver circuitry, but also that are cognizant of the real-time implementation constraints in application specific VLSI architectures.

This tutorial will describe the key issues required to make an impact in the design of low-power and high-performance signal processing-based optical communications links. The tutorial will present a seamless approach that weaves together system level algorithmic, and architectural issues in addressing the performance and throughput challenges inherent in an EDC-based link. Earlier this year, Dr. Shanbhag presented a circuits-oriented tutorial on the fundamentals of electronic dispersion compensation at the International Solid State Circuits Conference in order to enhance the awareness of EDC in the semiconductor design community. This tutorial is being proposed in order to achieve a similar goal for the signal processing community.

Outline

  1. Background and Models for Optical Fiber Transmission Systems:
    1. Introduction to fiber optical transmission systems
    2. Optical Signal Modeling and Models for Optical Transmission: OOK (on-off keying), NRZ (non-return to zero), RZ (return to zero), ODB (optical duo-binary), DPSK (differential phase shift keying), DP-DQPSK (dual polarization differential quadrature phase shift keying) modulation formats
    3. Optical Channel Modeling for single-mode fiber (SMF) and multimode fiber (MMF), polarization mode dispersion (PMD) and chromatic dispersion (CD), optical amplifier models, linear models and linearization methods for the fully nonlinear Schrödinger equation
    4. Noise modeling: thermal noise, (amplified) spontaneous emission noise, photoelectron noise, dominant noise sources in transmitter, fiber, and receiver, optical signal to noise ratio (OSNR).
    5. Receiver Structures and Models (PIN and APD receivers)
    6. Transmitter to receiver discrete-time equivalent (approximate) channel models.
  2. Linear and Nonlinear Dispersion Compensation (Equalization) Methods
    1. Receive-only channel estimation, acquisition, and tracking methods based via LMS and RLS
    2. Linear and Nonlinear Equalizer structures and their benefits/costs: FFE, DFE, MLSE designs
    3. Adaptation strategies, fixed-precision effects modeling, operation with extremely limited ADC front end (2-6 bits resolution)
    4. Architectural choices for high throughput operation (10Gb/s+)
    5. Existing systems at 10Gb/s employing EDC for MMF and SMF applications
    6. OIF emerging standards for 40Gb/s and 100Gb/s transmission and EDC.
  3. VLSI Architectures
    1. Brief overview of mixed-signal challenges
    2. Challenges and promising solutions for implementation of the DSP blocks
    3. Implementation of MLSE-based receivers at 10+Gb/s.
  4. Case Study of a OC-192 EDC-based Receiver: A recently designed EDC chip-set operating at 12.5 Gb/s, and consisting of a SiGe analog mixed signal front-end followed by a CMOS DSP back-end will be employed as a case study in order to illustrate the key principles described in topics 1 - 3 above.

Speaker Biographies

Andrew C. Singer received the S.B., S.M., and Ph.D. degrees, all in electrical engineering and computer science, from the Massachusetts Institute of Technology in 1990, 1992, and 1996, respectively. Since 1998, he has been on the faculty of the Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign, where he is currently an Associate Professor in the ECE department, a Research Associate Professor in the Coordinated Science Laboratory, and a Willett Faculty Scholar. During the academic year 1996, he was a Postdoctoral Research Affiliate in the Research Laboratory of Electronics at MIT. From 1996 to 1998, he was a Research Scientist at Sanders, A Lockheed Martin Company in Manchester, New Hampshire, where he designed algorithms, architectures and systems for a variety of DOD applications. His research spans statistical signal processing and communication systems and machine learning. He was a Hughes Aircraft Masters Fellow, and was the recipient of the Harold L. Hazen Memorial Award for excellence in teaching in 1991. In 2000, he received the National Science Foundation CAREER Award; in 2001 he received the Xerox Faculty Research Award, and in 2002 was named a Willett Faculty Scholar. Dr. Singer just finished serving two terms as an Associate Editor for the IEEE Transactions on Signal Processing and is on the Signal Processing Theory and Methods Technical Committee and the Machine Learning for Signal Processing Technical Committee of the IEEE Signal Processing Society. He is also a member of the MIT Educational Council, and of Eta Kappa Nu and Tau Beta Pi.

In 2005, Prof. Singer was appointed as the Director of the Technology Entrepreneur Center (TEC) in the College of Engineering and has started several successful initiatives in the Center since. He also co-founded Intersymbol Communications, Inc., a venture-funded fables semiconductor IC company, based in Champaign Illinois. Intersymbol develops signal processing enhanced chips for ultra-high speed optical communications systems. In 2007, Intersymbol was acquired by Finisar Corporation (NASD:FNSR), based in Sunnyvale California, where Dr. Singer presently serves as a Sr. Scientist on a part-time basis.

Naresh R. Shanbhag received his Ph.D. degree in EE from the University of Minnesota in 1993. From July 1993 to August 1995, he worked in AT&T Bell Laboratories at Murray Hill, New Jersey, where he was responsible for the development of VLSI algorithms, architectures and implementation of broadband data communications transceivers. In particular, he was the lead chip architect for AT&T's 51.84 Mb/s transceiver chips over twisted-pair wiring for Asynchronous Transfer Mode (ATM)-LAN and very high-speed digital subscriber line (VDSL) chip-sets. Since August 1995, he is with the Department of Electrical and Computer Engineering, and the Coordinated Science Laboratory where he is presently a Professor.

Dr. Shanbhag’s research focuses on two major areas: the design of VLSI chips for broadband communications and the design of energy-efficient and reliable VLSI chips employing communication system design principles. He has published more than 90 journal articles/book chapters/conference publications in this area and holds three US patents. He is also a co-author of the research monograph Pipelined Adaptive Digital Filters published by Kluwer Academic Publishers in 1994.

Dr. Shanbhag became a Fellow of IEEE in 2006, received the 2001 IEEE Transactions on VLSI Best Paper Award, the 1999 IEEE Leon K. Kirchmayer Best Paper Award, the 1999 Xerox Faculty Award, the National Science Foundation CAREER Award in 1996, and the 1994 Darlington Best Paper Award from the IEEE Circuits and Systems Society. Since July 1997, he is a Distinguished Lecturer for the IEEE Circuits and Systems Society. From 1997-99 and from 1999-2002, he served as an Associate Editor for the IEEE Transaction on Circuits and Systems: Part II and the IEEE Transactions on VLSI, respectively. He is currently serving on the technical program committees of major international conferences such as the International Solid-State Circuits Conference (ISSCC), the International Conference on Computer-Aided Design (ICCAD), the International Symposium on Low-Power Design (ISLPED), the International Conference on Acoustics, Speech and Signal Processing (ICASSP), the IEEE Signal Processing Systems Workshop (SiPS), and the International Symposium on Circuits and Systems (ISCAS).

Dr. Shanbhag is a co-founder (along with Dr. Singer) and Chief Technology Officer of Intersymbol Communications, Inc., a venture-funded fabless semiconductor start-up that provides mixed-signal ICs for electronic dispersion compensation for optical links. Intersymbol Communications, Inc., was acquired by Finisar Corporation in 2007, where Dr. Shanbhag also serves as a Sr. Scientist on a part-time basis.


©2008 Conference Management Services, Inc. -||- email: webmaster@icassp2008.com -||- Last updated Thursday, January 24, 2008